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| TS4990 1.2 W audio power amplifier with active low standby mode Features TS4990IJT/TS4990EIJT - Flip-chip 9 bumps Operating range from VCC = 2.2 V to 5.5 V 1.2 W output power @ VCC = 5 V, THD = 1%, F = 1 kHz, with 8 load Ultra-low consumption in standby mode (10 nA) 62 dB PSRR at 217 Hz in grounded mode Near-zero pop and click Ultra-low distortion (0.1%) Unity gain stable Available in 9-bump flip-chip, miniSO-8 and DFN8 packages TS4990IST - MiniSO-8 VinGND BYPASS Vin+ VCC STBY VOUT1 GND VOUT2 Applications Mobile phones (cellular / cordless) Laptop / notebook computers PDAs Portable audio devices TS4990IQT - DFN8 STANDBY BYPASS VIN+ VIN- Description The TS4990 is designed for demanding audio applications such as mobile phones to reduce the number of external components. This audio power amplifier is capable of delivering 1.2 W of continuous RMS output power into an 8 load at 5 V. An externally controlled standby mode reduces the supply current to less than 10 nA. It also includes an internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors. 1 2 3 4 8 7 6 5 VOUT 2 GND Vcc VOUT 1 TS4990ID/TS4990IDT - SO-8 STBY BYPASS 1 8 VOUT2 GND VCC VOUT1 2 7 VIN+ VIN- 3 6 4 5 May 2008 Rev 12 1/32 www.st.com 32 Contents TS4990 Contents 1 2 3 4 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 BTL configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Gain in a typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Low and high frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Power dissipation and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Wake-up time (tWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Pop performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Application example: differential input, BTL power amplifier . . . . . . . . . . 22 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 5.2 5.3 5.4 Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 7 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2/32 TS4990 Absolute maximum ratings and operating conditions 1 Table 1. Symbol VCC Vin Toper Tstg Tj Absolute maximum ratings and operating conditions Absolute maximum ratings (AMR) Parameter Supply voltage (1) Input voltage (2) Value 6 GND to VCC -40 to + 85 -65 to +150 150 250 215 120 Internally limited Unit V V C C C Operating free-air temperature range Storage temperature Maximum junction temperature Thermal resistance junction to ambient Flip chip (3) MiniSO-8 DFN8 Power dissipation HBM: Human body model MM: Machine model(5) Latch-up immunity Lead temperature (soldering, 10sec) Lead temperature (soldering, 10sec) for lead-free version (4) Rthja C/W Pdiss ESD 2 200 200 250 260 kV V mA C 1. All voltage values are measured with respect to the ground pin. 2. The magnitude of the input signal must never exceed VCC + 0.3 V / GND - 0.3 V. 3. The device is protected in case of over temperature by a thermal shutdown active at 150 C. 4. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 5. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. Table 2. Symbol VCC Vicm VSTBY RL TSD Operating conditions Parameter Supply voltage Common mode input voltage range Standby voltage input: Device ON Device OFF Load resistor Thermal shutdown temperature Thermal resistance junction to ambient Flip-chip (1) MiniSO-8 DFN8(2) Value 2.2 to 5.5 1.2V to VCC 1.35 VSTBY VCC GND VSTBY 0.4 4 150 100 190 40 Unit V V V C Rthja C/W 1. This thermal resistance is reached with a 100 mm2 copper heatsink surface. 2. When mounted on a 4-layer PCB. 3/32 Typical application schematics TS4990 2 Typical application schematics Figure 1. Typical application schematics Rfeed Cfeed Vcc + Cs VCC Audio In Cin Rin Vin- Vout 1 Vin+ + Speaker 8 Ohms AV = -1 Bypass Vout 2 + Standby Control Cb Standby Bias GND Table 3. Component descriptions Functional description Inverting input resistor that sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (Fc = 1 / (2 x Pi x Rin x Cin)). Input coupling capacitor that blocks the DC voltage at the amplifier input terminal. Feed back resistor that sets the closed loop gain in conjunction with Rin. Supply bypass capacitor that provides power supply filtering. Bypass pin capacitor that provides half supply filtering. Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1/ (2 x Pi x Rfeed x Cfeed)). Closed loop gain in BTL configuration = 2 x (Rfeed / Rin). DFN8 exposed pad is electrically connected to pin 7. See DFN8 package information on page 28 for more information. Component Rin Cin Rfeed Cs Cb Cfeed AV Exposed pad 4/32 + TS4990 TS4990 Electrical characteristics 3 Electrical characteristics Table 4. Symbol ICC ISTBY Voo Pout THD + N Electrical characteristics when VCC = +5 V, GND = 0 V, Tamb = 25C (unless otherwise specified) Parameter Supply current No input signal, no load Standby current (1) No input signal, VSTBY = GND, RL = 8 Output offset voltage No input signal, RL = 8 Output power THD = 1% max, F = 1kHz, RL = 8 Total harmonic distortion + noise Pout = 1Wrms, AV = 2, 20Hz F 20kHz, RL = 8 Power supply rejection ratio(2) RL = 8, AV = 2, Vripple = 200mVpp, input grounded F = 217Hz F = 1kHz Wake-up time (Cb = 1F) Standby time (Cb = 1F) Standby voltage level high Standby voltage level low Phase margin at unity gain RL = 8 CL = 500pF , Gain margin RL = 8 CL = 500pF , Gain bandwidth product RL = 8 Resistor output to GND (VSTBY VSTBYL) Vout1 Vout2 65 15 1.5 0.9 Min. Typ. 3.7 10 1 1.2 0.2 Max. 6 1000 10 Unit mA nA mV W % PSRR 55 55 62 64 90 10 1.3 0.4 130 dB tWU tSTBY VSTBYH VSTBYL M GM GBP ms s V V Degrees dB MHz ROUT-GND 3 43 k 1. Standby mode is active when VSTBY is tied to GND. 2. All PSRR data limits are guaranteed by production sampling tests. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon VCC. 5/32 Electrical characteristics Table 5. Symbol ICC ISTBY Voo Pout THD + N TS4990 Electrical characteristics when VCC = +3.3 V, GND = 0 V, Tamb = 25C (unless otherwise specified) Parameter Supply current No input signal, no load Standby current (1) No input signal, VSTBY = GND, RL = 8 Output offset voltage No input signal, RL = 8 Output power THD = 1% max, F = 1kHz, RL = 8 Total harmonic distortion + noise Pout = 400mWrms, AV = 2, 20Hz F 20kHz, RL = 8 Power supply rejection ratio(2) RL = 8, AV = 2, Vripple = 200mVpp, input grounded F = 217Hz F = 1kHz Wake-up time (Cb = 1F) Standby time (Cb = 1F) Standby voltage level high Standby voltage level low Phase margin at unity gain , RL = 8 CL = 500pF Gain margin , RL = 8 CL = 500pF Gain bandwidth product RL = 8 Resistor output to GND (VSTBY VSTBYL) Vout1 Vout2 65 15 1.5 375 Min. Typ. 3.3 10 1 500 0.1 Max. 6 1000 10 Unit mA nA mV mW % PSRR 55 55 61 63 110 10 1.2 0.4 140 dB tWU tSTBY VSTBYH VSTBYL M GM GBP ms s V V Degrees dB MHz ROUT-GND 4 44 k 1. Standby mode is active when VSTBY is tied to GND. 2. All PSRR data limits are guaranteed by production sampling tests. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon VCC. 6/32 TS4990 Table 6. Symbol ICC ISTBY Voo Pout THD + N Electrical characteristics Electrical characteristics when VCC = 2.6V, GND = 0V, Tamb = 25C (unless otherwise specified) Parameter Supply current No input signal, no load Standby current (1) No input signal, VSTBY = GND, RL = 8 Output offset voltage No input signal, RL = 8 Output power THD = 1% max, F = 1kHz, RL = 8 Total harmonic distortion + noise Pout = 200mWrms, AV = 2, 20Hz F 20kHz, RL = 8 Power supply rejection ratio(2) RL = 8, AV = 2, Vripple = 200mVpp, input grounded F = 217Hz F = 1kHz Wake-up time (Cb = 1F) Standby time (Cb = 1F) Standby voltage level high Standby voltage level low Phase margin at unity gain , RL = 8 CL = 500pF Gain margin , RL = 8 CL = 500pF Gain bandwidth product RL = 8 Resistor output to GND (VSTBY VSTBYL) Vout1 Vout2 65 15 1.5 220 Min. Typ. 3.1 10 1 300 0.1 Max. 6 1000 10 Unit mA nA mV mW % PSRR 55 55 60 62 125 10 1.2 0.4 150 dB tWU tSTBY VSTBYH VSTBYL M GM GBP ms s V V Degrees dB MHz ROUT-GND 6 46 k 1. Standby mode is active when VSTBY is tied to GND. 2. All PSRR data limits are guaranteed by production sampling tests. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon VCC. 7/32 Electrical characteristics TS4990 Figure 2. 60 40 20 Gain (dB) Open loop frequency response 0 Gain -40 Phase () Figure 3. 60 Open loop frequency response 0 Gain 40 20 Gain (dB) -40 Phase Phase () Phase -80 -80 0 -120 -20 -40 -60 0.1 Vcc = 5V RL = 8 Tamb = 25C 1 10 100 1000 -160 0 -120 -20 -40 -60 0.1 Vcc = 3.3V RL = 8 Tamb = 25C 1 10 100 1000 -160 -200 10000 -200 10000 Frequency (kHz) Frequency (kHz) Figure 4. 60 Open loop frequency response 0 Gain Figure 5. 100 80 Open loop frequency response 0 Gain 40 20 Gain (dB) -40 60 Phase () -40 Phase () Phase () Gain (dB) Phase -80 40 Phase 20 0 -80 0 -120 -20 -40 -60 0.1 Vcc = 2.6V RL = 8 Tamb = 25C 1 10 100 1000 -160 -120 -20 -200 10000 -40 0.1 Vcc = 5V CL = 560pF Tamb = 25C 1 10 100 1000 -160 -200 10000 Frequency (kHz) Frequency (kHz) Figure 6. 100 80 60 Gain (dB) Open loop frequency response 0 Gain Figure 7. 100 80 Open loop frequency response 0 Gain -40 60 Gain (dB) Phase () -40 40 Phase 20 0 -20 -40 0.1 Vcc = 3.3V CL = 560pF Tamb = 25C 1 10 100 1000 -80 40 Phase 20 0 -80 -120 -120 -160 -20 -200 10000 -40 0.1 Vcc = 2.6V CL = 560pF Tamb = 25C 1 10 100 1000 -160 -200 10000 Frequency (kHz) Frequency (kHz) 8/32 TS4990 Electrical characteristics Figure 8. 0 -10 -20 PSRR (dB) PSRR vs. power supply Figure 9. 0 PSRR vs. power supply -30 -40 -50 -60 PSRR (dB) Vripple = 200mVpp Av = 2 Input = Grounded Cb = Cin = 1F RL >= 4 Tamb = 25C -10 Vcc : 2.2V 2.6V 3.3V 5V -20 Vripple = 200mVpp Av = 10 Input = Grounded Cb = Cin = 1F RL >= 4 Tamb = 25C Vcc : 2.2V 2.6V 3.3V 5V -30 -40 -50 -70 100 1000 10000 Frequency (Hz) 100000 100 1000 10000 Frequency (Hz) 100000 Figure 10. PSRR vs. power supply 0 -10 -20 PSRR (dB) Figure 11. PSRR vs. power supply 0 -30 -40 -50 -60 -70 -80 PSRR (dB) Vripple = 200mVpp Rfeed = 22k Input = Floating Cb = 1F RL >= 4 Tamb = 25C Vcc = 2.2, 2.6, 3.3, 5V -10 -20 -30 -40 -50 -60 Vripple = 200mVpp Av = 5 Input = Grounded Cb = Cin = 1F RL >= 4 Tamb = 25C Vcc : 2.2V 2.6V 3.3V 5V 100 1000 10000 Frequency (Hz) 100000 100 1000 10000 Frequency (Hz) 100000 Figure 12. PSRR vs. power supply 0 -10 -20 -30 -40 -50 -60 Vcc = 5, 3.3, 2.5 & 2.2V Vripple = 200mVpp Av = 2 Input = Grounded Cb = 0.1F, Cin = 1F RL >= 4 Tamb = 25C Figure 13. PSRR vs. power supply 0 -10 -20 PSRR (dB) PSRR (dB) -30 -40 -50 -60 -70 Vripple = 200mVpp Rfeed = 22k Input = Floating Cb = 0.1F RL >= 4 Tamb = 25C Vcc = 2.2, 2.6, 3.3, 5V 100 1000 10000 Frequency (Hz) 100000 -80 100 1000 10000 Frequency (Hz) 100000 9/32 Electrical characteristics TS4990 Figure 14. PSRR vs. DC output voltage 0 -10 -20 PSRR (dB) Figure 15. PSRR vs. DC output voltage 0 PSRR (dB) -30 -40 -50 Vcc = 5V Vripple = 200mVpp RL = 8 Cb = 1F AV = 2 Tamb = 25C -10 -20 Vcc = 5V Vripple = 200mVpp RL = 8 Cb = 1F AV = 10 Tamb = 25C -30 -40 -60 -70 -5 -50 -5 -4 -3 -2 -1 0 1 2 3 Differential DC Output Voltage (V) 4 5 -4 -3 -2 -1 0 1 2 3 Differential DC Output Voltage (V) 4 5 Figure 16. PSRR vs. DC output voltage 0 -10 -20 -30 -40 -50 -60 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Differential DC Output Voltage (V) Vcc = 3.3V Vripple = 200mVpp RL = 8 Cb = 1F AV = 5 Tamb = 25C Figure 17. PSRR vs. DC output voltage 0 -10 -20 -30 -40 -50 -60 -5 Vcc = 5V Vripple = 200mVpp RL = 8 Cb = 1F AV = 5 Tamb = 25C PSRR (dB) PSRR (dB) -4 -3 -2 -1 0 1 2 3 Differential DC Output Voltage (V) 4 5 Figure 18. PSRR vs. DC output voltage 0 -10 -20 Vcc = 3.3V Vripple = 200mVpp RL = 8 Cb = 1F AV = 2 Tamb = 25C Figure 19. PSRR vs. DC output voltage 0 Vcc = 3.3V Vripple = 200mVpp RL = 8 Cb = 1F AV = 10 Tamb = 25C -10 PSRR (dB) PSRR (dB) -30 -40 -50 -20 -30 -40 -60 -70 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Differential DC Output Voltage (V) -50 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Differential DC Output Voltage (V) 10/32 TS4990 Electrical characteristics Figure 20. PSRR vs. DC output voltage 0 -10 -20 Vcc = 2.6V Vripple = 200mVpp RL = 8 Cb = 1F AV = 2 Tamb = 25C Figure 21. PSRR vs. DC output voltage 0 Vcc = 2.6V Vripple = 200mVpp RL = 8 Cb = 1F AV = 10 Tamb = 25C -10 PSRR (dB) PSRR (dB) -30 -40 -50 -20 -30 -40 -60 -70 -2.5 -2.0 -1.5 -1.0 -0.5 -50 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5 Differential DC Output Voltage (V) Differential DC Output Voltage (V) Figure 22. Output power vs. power supply voltage 2.4 2.2 RL = 4 F = 1kHz 2.0 BW < 125kHz 1.8 Tamb = 25C 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 5.5 THD+N=1% THD+N=10% Figure 23. PSRR vs. DC output voltage 0 -10 -20 -30 -40 -50 -60 -2.5 -2.0 -1.5 -1.0 -0.5 Vcc = 2.6V Vripple = 200mVpp RL = 8 Cb = 1F AV = 5 Tamb = 25C Output power (W) PSRR (dB) 0.0 0.5 1.0 1.5 2.0 2.5 Differential DC Output Voltage (V) Figure 24. PSRR at F = 217 Hz vs. bypass capacitor Figure 25. Output power vs. power supply voltage 2.0 -30 PSRR at 217Hz (dB) -40 Output power (W) Av=10 Vcc: 2.6V 3.3V 5V RL = 8 F = 1kHz 1.6 BW < 125kHz Tamb = 25C 1.4 1.8 1.2 1.0 0.8 0.6 0.4 THD+N=1% THD+N=10% -50 Av=2 Vcc: 2.6V 3.3V 5V -60 -70 Av=5 Vcc: 2.6V 3.3V 5V 1 Bypass Capacitor Cb ( F) Tamb=25C 0.2 0.0 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 5.5 -80 0.1 11/32 Electrical characteristics TS4990 Figure 26. Output power vs. power supply voltage 1.2 RL = 16 F = 1kHz 1.0 BW < 125kHz Tamb = 25C 0.8 0.6 0.4 THD+N=1% 0.2 0.0 Figure 27. Output power vs. load resistor 2.2 2.0 1.8 THD+N=10% Output power (W) Output power (W) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 THD+N=1% THD+N=10% Vcc = 5V F = 1kHz BW < 125kHz Tamb = 25C 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 5.5 0.0 4 8 12 16 20 24 Load Resistance ( ) 28 32 Figure 28. Output power vs. load resistor Figure 29. Output power vs. power supply voltage 0.6 0.6 0.5 Vcc = 2.6V F = 1kHz BW < 125kHz Tamb = 25C THD+N=10% 0.3 0.2 0.1 0.0 THD+N=1% 0.5 Output power (W) Output power (W) RL = 32 F = 1kHz BW < 125kHz Tamb = 25C THD+N=10% 0.4 0.4 0.3 0.2 THD+N=1% 0.1 0.0 4 8 12 16 20 24 Load Resistance ( ) 28 32 2.5 3.0 3.5 4.0 Vcc (V) 4.5 5.0 5.5 Figure 30. Output power vs. load resistor 1.0 Vcc = 3.3V F = 1kHz BW < 125kHz Tamb = 25C THD+N=10% 0.6 Figure 31. Power dissipation vs. Pout 1.4 Vcc=5V 1.2 F=1kHz THD+N<1% 1.0 0.8 0.6 0.4 0.2 RL=16 0.0 0.0 RL=8 0.4 0.2 THD+N=1% 0.0 8 16 24 Load Resistance ( ) 32 Power Dissipation (W) 0.8 Output power (W) RL=4 0.2 0.4 0.6 0.8 1.0 1.2 Output Power (W) 1.4 1.6 12/32 TS4990 Electrical characteristics Figure 32. Power dissipation vs. Pout 0.6 Vcc=3.3V F=1kHz 0.5 THD+N<1% Power Dissipation (W) Figure 33. Power derating curves Flip-Chip Package Power Dissipation (W) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 No Heat sink RL=4 Heat sink surface 100mm (See demoboard) 2 0.4 0.3 0.2 RL=8 0.1 RL=16 0.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 25 50 75 100 125 150 Output Power (W) Ambiant Temperature ( C) Figure 34. Clipping voltage vs. power supply voltage and load resistor 0.7 Tamb = 25C Vout1 & Vout2 Clipping Voltage Low side (V) Figure 35. Power dissipation vs. Pout 0.40 RL = 4 0.35 Vcc=2.6V F=1kHz THD+N<1% RL=4 0.6 0.5 0.4 Power Dissipation (W) 0.30 0.25 0.20 0.15 RL=8 0.10 0.05 RL=16 0.1 0.2 Output Power (W) 0.3 RL = 8 0.3 0.2 0.1 RL = 16 0.0 2.5 3.0 3.5 4.0 4.5 5.0 0.00 0.0 0.4 Power supply Voltage (V) Figure 36. Clipping voltage vs. power supply voltage and load resistor 0.6 Tamb = 25C RL = 4 Figure 37. Current consumption vs. power supply voltage 4.0 No load 3.5 Tamb=25C Current Consumption (mA) Vout1 & Vout2 Clipping Voltage High side (V) 0.5 0.4 RL = 8 0.3 0.2 0.1 RL = 16 0.0 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 3.5 4.0 4.5 5.0 0 1 2 3 4 5 Power supply Voltage (V) Power Supply Voltage (V) 13/32 Electrical characteristics TS4990 Figure 38. Current consumption vs. standby voltage @ VCC = 5V 4.0 3.5 Current Consumption (mA) Figure 39. Current consumption vs. standby voltage @ VCC = 2.6V 4.0 Vcc = 2.6V 3.5 No load Tamb=25C 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 Vcc = 5V No load Tamb=25C 4 5 Standby Voltage (V) Current Consumption (mA) Standby Voltage (V) Figure 40. THD + N vs. output power Figure 41. Current consumption vs. standby voltage @ VCC = 3.3V 4.0 Vcc = 3.3V 3.5 No load Tamb=25C 3.0 2.5 2.0 1.5 1.0 0.5 10 THD + N (%) Vcc=2.2V Vcc=2.6V 0.1 Vcc=3.3V Vcc=5V Current Consumption (mA) RL = 4 F = 20Hz Av = 2 Cb = 1F BW < 125kHz 1 Tamb = 25C 1E-3 0.01 0.1 Output Power (W) 1 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Standby Voltage (V) Figure 42. Current consumption vs. standby voltage @ VCC = 2.2V 4.0 Vcc = 2.2V 3.5 No load Tamb=25C 3.0 2.5 2.0 1.5 1.0 0.5 Figure 43. THD + N vs. output power 10 RL = 8 F = 20Hz Av = 2 Cb = 1F 1 BW < 125kHz Tamb = 25C Current Consumption (mA) THD + N (%) Vcc=2.2V Vcc=2.6V 0.1 Vcc=3.3V Vcc=5V 0.0 0.0 0.5 1.0 1.5 2.0 0.01 1E-3 Standby Voltage (V) 0.01 0.1 Output Power (W) 1 14/32 TS4990 Electrical characteristics Figure 44. THD + N vs. output power 10 RL = 16 F = 20kHz Av = 2 Cb = 1F 1 BW < 125kHz Tamb = 25C Figure 45. THD + N vs. output power 10 RL = 8 F = 1kHz Av = 2 Cb = 1F 1 BW < 125kHz Tamb = 25C THD + N (%) THD + N (%) Vcc=2.2V Vcc=2.6V Vcc=2.2V Vcc=2.6V 0.1 0.1 Vcc=3.3V Vcc=5V Vcc=3.3V Vcc=5V 0.01 1E-3 0.01 0.1 Output Power (W) 1 0.01 1E-3 0.01 0.1 Output Power (W) 1 Figure 46. THD + N vs. output power 10 RL = 4 F = 20kHz Av = 2 Cb = 1F BW < 125kHz Tamb = 25C 1 Figure 47. THD + N vs. output power 10 RL = 4 F = 1kHz Av = 2 Cb = 1F BW < 125kHz 1 Tamb = 25C Vcc=2.2V THD + N (%) THD + N (%) Vcc=2.2V Vcc=2.6V Vcc=2.6V 0.1 Vcc=3.3V Vcc=5V Vcc=3.3V Vcc=5V 0.1 1E-3 0.01 0.1 Output Power (W) 1 1E-3 0.01 0.1 Output Power (W) 1 Figure 48. THD + N vs. output power 10 RL = 16 F = 1kHz Av = 2 1 Cb = 1F BW < 125kHz Tamb = 25C Figure 49. THD + N vs. output power 10 RL = 8 F = 20kHz Av = 2 Cb = 1F BW < 125kHz 1 Tamb = 25C THD + N (%) THD + N (%) Vcc=2.2V Vcc=2.6V Vcc=3.3V Vcc=2.2V 0.1 Vcc=2.6V 0.1 0.01 1E-3 0.01 0.1 Output Power (W) Vcc=5V Vcc=3.3V Vcc=5V 1 1E-3 0.01 0.1 Output Power (W) 1 15/32 Electrical characteristics TS4990 Figure 50. THD + N vs. output power 10 RL = 16 F = 20kHz Av = 2 Cb = 1F 1 BW < 125kHz Tamb = 25C Figure 51. THD + N vs. frequency THD + N (%) Vcc=2.2V RL=8 Av=2 Cb = 1F Bw < 125kHz Tamb = 25C THD + N (%) Vcc=5V, Po=1W 0.1 Vcc=2.6V 0.1 Vcc=2.2V, Po=130mW Vcc=3.3V Vcc=5V 0.01 1E-3 0.01 0.01 0.1 Output Power (W) 1 20 100 1000 Frequency (Hz) 10000 20k Figure 52. SNR vs. power supply with unweighted filter (20Hz to 20kHz) 110 RL=16 Signal to Noise Ratio (dB) Figure 53. THD + N vs. frequency 1 RL=4 Av=2 Cb = 1F Bw < 125kHz Tamb = 25C 105 100 THD + N (%) Vcc=5V, Po=1.3W 95 RL=4 90 Av = 2 85 Cb = 1F THD+N < 0.7% Tamb = 25C 80 2.5 3.0 RL=8 Vcc=2.2V, Po=150mW 0.1 3.5 4.0 4.5 5.0 20 100 Power Supply Voltage (V) 1000 Frequency (Hz) 10000 20k Figure 54. THD + N vs. frequency Figure 55. SNR vs. power supply with unweighted filter (20Hz to 20kHz) 95 Signal to Noise Ratio (dB) RL=16 Av=2 Cb = 1F Bw < 125kHz Tamb = 25C RL=16 90 THD + N (%) 0.1 Vcc=5V, Po=0.55W Vcc=2.2V, Po=100mW 85 RL=8 80 Av = 10 75 Cb = 1F THD+N < 0.7% Tamb = 25C 70 2.5 3.0 RL=4 0.01 20 100 1000 Frequency (Hz) 10000 20k 3.5 4.0 4.5 5.0 Power Supply Voltage (V) 16/32 TS4990 Electrical characteristics Figure 56. Signal to noise ratio vs. power supply with a weighted filter 110 RL=16 Signal to Noise Ratio (dB) Figure 57. Output noise voltage device ON 45 Output Noise Voltage ( Vrms) 105 100 RL=8 95 90 Av = 2 85 Cb = 1F THD+N < 0.7% Tamb = 25C 80 2.5 3.0 RL=4 40 35 30 25 20 Vcc=2.2V to 5.5V Cb=1F RL=8 Tamb=25C Unweighted Filter A Weighted Filter 15 10 3.5 4.0 4.5 5.0 2 4 Power Supply Voltage (V) 6 Closed Loop Gain 8 10 Figure 58. Signal to noise ratio vs. power supply with a weighted filter 100 RL=16 Signal to Noise Ratio (dB) Figure 59. Output noise voltage device in Standby 2.0 1.8 Output Noise Voltage ( Vrms) 95 90 RL=8 85 80 Av = 10 75 Cb = 1F THD+N < 0.7% Tamb = 25C 70 2.5 3.0 RL=4 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 Vcc=2.2V to 5.5V Cb=1F RL=8 Tamb=25C 2 4 6 Closed Loop Gain 8 10 A Weighted Filter Unweighted Filter 3.5 4.0 4.5 5.0 0.0 Power Supply Voltage (V) 17/32 Application information TS4990 4 4.1 Application information BTL configuration principle The TS4990 is a monolithic power amplifier with a BTL output type. BTL (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. Thus, we have: Single-ended output 1 = Vout1 = Vout (V) Single-ended output 2 = Vout2 = -Vout (V) and Vout1 - Vout2 = 2Vout (V) The output power is: ( 2V out ) RMS P out = -----------------------------RL 2 For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single-ended configuration. 4.2 Gain in a typical application The typical application schematics are shown in Figure 1 on page 4. In the flat region (no Cin effect), the output voltage of the first stage is (in Volts): R feed V out1 = ( - V in ) ------------R in For the second stage: Vout2 = -Vout1 (V) The differential output voltage is (in Volts): R feed V out2 - V out1 = 2V in ------------R in The differential gain named gain (Gv) for more convenience is: R feed V out2 - V out1 G v = ---------------------------------- = 2 ------------R in V in Vout2 is in phase with Vin and Vout1 is phased 180 with Vin. This means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1. 4.3 Low and high frequency response In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter with a -3 dB cut-off frequency. FCL is in Hz. 1 F CL = ----------------------2R in C in In the high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with Rfeed. It forms a low-pass filter with a -3 dB cut-off frequency. FCH is in Hz. 1 F CH = -----------------------------------2R feed C feed 18/32 TS4990 Application information The graph in Figure 60 shows an example of Cin and Cfeed influence. Figure 60. Frequency response gain vs. Cin and Cfeed 10 5 0 Gain (dB) Cfeed = 330pF Cfeed = 680pF Cin = 470nF Cin = 22nF Cin = 82nF Rin = Rfeed = 22k Tamb = 25C 10000 Cfeed = 2.2nF -5 -10 -15 -20 -25 10 100 1000 Frequency (Hz) 4.4 Power dissipation and efficiency Hypotheses: Load voltage and current are sinusoidal (Vout and Iout). Supply voltage is a pure DC source (VCC). The load can be expressed as: V out = V PEAK sint (V) and V out I out = -----------RL (A) and V PEAK P out = -----------------------2R L 2 (W) Therefore, the average current delivered by the supply voltage is: I CC AVG PEAK = 2 --------------------- V R L (A) The power delivered by the supply voltage is: P supply = V CC I CC AVG (W) 19/32 Application information Therefore, the power dissipated by each amplifier is: Pdiss = Psupply - Pout (W) 2 2V CC P diss = ---------------------- P out - P out RL TS4990 and the maximum value is obtained when: P diss ----------------- = 0 P out and its value is: P diss max 2V CC = -------------2 RL 2 (W) Note: This maximum value is only dependent on power supply voltage and load values. The efficiency is the ratio between the output power and the power supply: P out V PEAK = ------------------ = ---------------------P supply 4V CC The maximum theoretical value is reached when VPEAK = VCC, so: ---- = 78.5% 4 4.5 Decoupling of the circuit Two capacitors are needed to correctly bypass the TS4990: a power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. Cs has particular influence on the THD+N in the high frequency region (above 7 kHz) and an indirect influence on power supply disturbances. With a value for Cs of 1 F, you can expect THD+N levels similar to those shown in the datasheet. In the high frequency region, if Cs is lower than 1 F, it increases THD+N and disturbances on the power supply rail are less filtered. On the other hand, if Cs is higher than 1 F, those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N at lower frequencies, but its function is critical to the final result of PSRR (with input grounded and in the lower frequency region). If Cb is lower than 1 F, THD+N increases at lower frequencies and PSRR worsens. If Cb is higher than 1 F, the benefit on THD+N at lower frequencies is small, but the benefit to PSRR is substantial. Note that Cin has a non-negligible effect on PSRR at lower frequencies. The lower the value of Cin, the higher the PSRR. 20/32 TS4990 Application information 4.6 Wake-up time (tWU) When the standby is released to put the device ON, the bypass capacitor Cb is not charged immediately. Because Cb is directly linked to the bias of the amplifier, the bias will not work properly until the Cb voltage is correct. The time to reach this voltage is called wake-up time or tWU and specified in the electrical characteristics tables with Cb = 1 F. If Cb has a value other than 1 F, refer to the graph in Figure 61 to establish the wake-up time. Figure 61. Typical wake-up time vs. Cb 600 500 Startup Time (ms) Tamb=25C Vcc=3.3V 400 300 200 Vcc=2.6V Vcc=5V 100 0 0.1 1 2 3 Bypass Capacitor Cb ( F) 4 4.7 Due to process tolerances, the maximum value of wake-up time is shown in Figure 62. Figure 62. Maximum wake-up time vs. Cb 600 Tamb=25C Vcc=3.3V Max. Startup Time (ms) 500 Vcc=2.6V 400 300 200 Vcc=5V 100 0 0.1 1 2 3 Bypass Capacitor Cb ( F) 4 4.7 Note: The bypass capacitor Cb also has a typical tolerance of +/-20%. To calculate the wake-up time with this tolerance, refer to the graph above (considering for example for Cb=1 F in the range of 0.8 FCb1.2 F). 4.7 Standby time When the standby command is set, the time required to put the two output stages in high impedance and the internal circuitry in standby mode is a few microseconds. In standby mode, the bypass pin and Vin pin are short-circuited to ground by internal switches. This allows a quick discharge of Cb and Cin capacitors. 21/32 Application information TS4990 4.8 Pop performance Pop performance is intimately linked with the size of the input capacitor Cin and the bias voltage bypass capacitor Cb. The size of Cin is dependent on the lower cut-off frequency and PSRR values requested. The size of Cb is dependent on THD+N and PSRR values requested at lower frequencies. Moreover, Cb determines the speed with which the amplifier turns ON. In order to reach near zero pop and click, the equivalent input constant time, in = (Rin + 2k) x Cin (s) with Rin 5k must not reach the in maximum value as indicated in Figure 63 below. Figure 63. in max. versus bypass capacitor 160 Tamb=25C Vcc=3.3V 120 in max. (ms) Vcc=2.6V 80 40 Vcc=5V 0 1 2 3 Bypass Capacitor Cb ( F) 4 By following the previous rules, the TS4990 can reach near zero pop and click even with high gains such as 20 dB. Example: With Rin = 22 k and a 20 Hz, -3 dB low cut-off frequency, Cin = 361 nF. So, Cin = 390 nF with standard value which gives a lower cut-off frequency equal to 18.5 Hz. In this case, (Rin + 2k) x Cin = 9.36ms. By referring to the previous graph, if Cb = 1 F and VCC = 5 V, we read 20 ms max. This value is twice as high as our current value, thus we can state that pop and click will be reduced to its lowest value. Minimizing both Cin and the gain benefits both the pop phenomenon, and the cost and size of the application. 4.9 Application example: differential input, BTL power amplifier The schematics in Figure 64 show how to configure the TS4990 to work in differential input mode. The gain of the amplifier is: R2 G VDIFF = 2 -----R1 In order to reach the best performance of the differential function, R1 and R2 should be matched at 1% max. 22/32 TS4990 Figure 64. Differential input amplifier configuration R2 Vcc Application information + Cs VCC Cin Neg. Input R1 Vin- Vout 1 Cin Pos. Input R1 Vin+ + Speaker 8 Ohms R2 AV = -1 Bypass Vout 2 + Standby Control Cb Standby Bias GND The input capacitor Cin can be calculated by the following formula using the -3 dB lower frequency required. (FL is the lower frequency required). 1 C in -------------------2R 1 F L (F) Note: This formula is true only if: 1 F CB = ---------------------------------------2 ( R 1 + R 2 )C B (Hz) is 5 times lower than FL. Example bill of materials The bill of materials in Table 7 is for the example of a differential amplifier with a gain of 2 and a -3 dB lower cut-off frequency of about 80 Hz. Table 7. Bill of materials for differential input amplifier application Pin name R1 R2 Cin Cb=Cs U1 Functional description 20k / 1% 20k / 1% 100nF 1F TS4990 + TS4990 23/32 Package information TS4990 5 Package information In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 5.1 Flip-chip package information Figure 65. Flip chip pinout (top view) 3 2 1 Vin+ VCC STBY VOUT1 GND VOUT2 Vin- GND BYPASS A B C Balls are underneath Figure 66. Marking (top view) E ST logo Product and assembly code: XXX A90 from Tours 90S from Shenzhen Three-digit datecode: YWW E symbol for lead-free only The dot indicates pin A1 Symbol for lead-free package XXX YWW 24/32 TS4990 Package information Figure 67. Package mechanical data for 9-bump flip-chip package 1.60 mm 0.5mm 0.25mm Die size: 1.60 x 1.60 mm 30m Die height (including bumps): 600m Bump diameter: 315m 50m Bump diameter before reflow: 300m 10m Bump height: 250m 40m Die height: 350m 20m Pitch: 500m 50m Coplanarity: 50m max * Back coating height: 100m 10m * Optional 1.60 mm 0.5mm 100m 600m Figure 68. Daisy chain mechanical data 1.6mm 3 2 1 A B C 1.6mm The daisy chain sample features two-by-two pin connections. The schematics in Figure 68 illustrate the way pins connect to each other. This sample is used to test continuity on your board. Your PCB needs to be designed the opposite way, so that pins that are unconnected in the daisy chain sample, are connected on your PCB. If you do this, by simply connecting an Ohmmeter between pin A1 and pin A3, the soldering process continuity can be tested. 25/32 Package information Figure 69. TS4990 footprint recommendations 500m =250m 500m 75m min. 100m max. TS4990 Track 500m =400m typ. =340m min. 150m min. Non Solder mask opening Pad in Cu 18m with Flash NiAu (2-6m, 0.2m max.) Figure 70. Tape and reel specification (top view) 500m 4 1.5 1 A A Die size Y + 70m 1 8 Die size X + 70m 4 All dimensions are in mm User direction of feed Device orientation The devices are oriented in the carrier pocket with pin number A1 adjacent to the sprocket holes. 26/32 TS4990 Package information 5.2 MiniSO-8 package information Figure 71. MiniSO-8 package mechanical drawing Table 8. MiniSO-8 package mechanical data Dimensions Ref. Min. A A1 A2 b c D E E1 e L L1 L2 k ccc 0 0.40 0 0.75 0.22 0.08 2.80 4.65 2.80 Millimeters Typ. Max. 1.1 0.15 0.85 0.95 0.40 0.23 3.00 4.90 3.00 0.65 0.60 0.95 0.25 8 0.10 0 0.80 0.016 3.20 5.15 3.10 0 0.030 0.009 0.003 0.11 0.183 0.11 Min. Inches Typ. Max. 0.043 0.006 0.033 0.037 0.016 0.009 0.118 0.193 0.118 0.026 0.024 0.037 0.010 8 0.004 0.031 0.126 0.203 0.122 27/32 Package information TS4990 5.3 Note: DFN8 package information DFN8 exposed pad (E2 x D2) is connected to pin number 7. For enhanced thermal performance, the exposed pad must be soldered to a copper area on the PCB, acting as a heatsink. This copper area can be electrically connected to pin7 or left floating. Figure 72. DFN8 3x3x0.90mm package mechanical drawing (pitch 0.5mm) Table 9. DFN8 3x3x0.90mm package mechanical data (pitch 0.5mm) Dimensions Ref. Min. A A1 A2 A3 b D D2 E E2 e L ddd 0.30 0.18 2.85 2.20 2.85 1.40 0.55 0.80 Millimeters Typ. 0.90 0.02 0.65 0.20 0.25 3.00 0.30 3.15 2.70 3.00 3.15 1.75 0.50 0.40 0.50 0.08 11.8 7.1 112.2 86.6 112.2 55.1 Max. 1.00 0.05 0.80 217 Min. 31.5 Mils Typ. 35.4 0.8 25.6 7.9 9.8 118.1 11.8 124 106.3 118.1 124 68.9 19.7 15.7 19.7 3.1 Max. 39.4 2.0 31.5 28/32 TS4990 Package information 5.4 SO-8 package information Figure 73. SO-8 package mechanical drawing Table 10. SO-8 package mechanical data Dimensions Ref. Min. A A1 A2 b c D H E1 e h L k ccc 0.25 0.40 1 0.10 1.25 0.28 0.17 4.80 5.80 3.80 Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 8 0.10 0.010 0.016 1 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min. Inches Typ. Max. 0.069 0.010 0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 8 0.004 0.197 0.244 0.157 29/32 Ordering information TS4990 6 Ordering information Table 11. Order codes Temperature range Package Flip chip, 9 bumps Flip chip, 9 bumps -40C, +85C MiniSO-8 DFN8 FC + back coating SO-8 Packing Tape & reel Tape & reel Tape & reel Tape & reel Tape & reel Tube or Tape & reel Marking 90 DC3 K990 K990 90 TS4990I Order code TS4990IJT TS4990EIJT(1) TSDC05IJT TSDC05EIJT(2) TS4990IST TS4990IQT TS4990EKIJT TS4990ID TS4990IDT 1. Lead-free Flip chip part number. 2. Lead free daisy chain part number. 30/32 TS4990 Revision history 7 Revision history Table 12. Date 1-Jul-2002 4-Sep-2003 1-Oct-2004 2-Apr-2005 May-2005 1-Jul-2005 28-Sep-2005 14-Mar-2006 21-Jul-2006 Document revision history Revision 1 2 3 4 5 6 7 8 9 First release. Update mechanical data. Order code for back coating on flip-chip. Typography error on page 1: Mini-SO-8 pin connection. New marking for assembly code plant. Error on Table 4 on page 5. Parameters in wrong column. Updated mechanical coplanarity data to 50m (instead of 60m) (see Figure 67 on page 25). SO-8 package inserted in the datasheet. Update of Figure 66 on page 24. Disclaimer update. Corrected value of PSRR in Table 5 on page 6 from 1 to 61 (typical value). Moved Table 3: Component descriptions to Section 2: Typical application schematics on page 4. Merged daisy chain flip-chip order code table into Table 11: Order codes on page 30. Corrected pitch error in DFN8 package information. Actual pitch is 0.5mm. Updated DFN8 package dimensions to correspond to JEDEC databook definition (in previous versions of datasheet, package dimensions were as in manufacturer's drawing). Corrected error in MiniSO-8 package information (L and L1 values were inverted). Reformatted package information. Corrected value of output resistance vs. ground in standby mode: removed from Table 2, and added in Table 4, Table 5, and Table 6. Changes 11-May-2007 10 17-Jan-2008 11 21-May-2008 12 31/32 TS4990 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 32/32 |
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